1. Field of the Invention
The present invention relates to a phase change memory device and fabrication method thereof, and more particularly to improvement of heater electrode configuration for heating a phase change material.
2. Description of Related Art
For nonvolatile memories widely used as information storage means in mobile-phones and the like, a phase change random access memory (hereinafter referred to as PRAM) which uses the change of resistance value of phase change material has been developed (refer to Japanese Patent Laid-Open Nos. 2006-179778 and 2003-332529).
FIG. 13 illustrates a memory cell structure (cross-sectional view) of a conventional PRAM. An MOS transistor and a storage device with phase change material are formed on semiconductor substrate 31.
Reference numeral 32 denotes a gate electrode of the transistor, and diffusion layers 33 and 34 doped with n-type impurity function as source and drain regions of the transistor. Gate electrode 32 functions as a word line for memory cell selection.
Interlayer insulating film 35 is formed on the gate electrode. Heater electrode 38 is connected to diffusion layer 33. Phase change material layer 39 is formed on heater electrode 38, and upper electrode 40 is formed on phase change material layer 39.
When current applys to heater electrode 38, heater electrode 38 generates heat and thus phase change material layer 39 is partially heated. This heating causes phase change in the vicinity of phase boundary between phase change material layer 39 and heater electrode 38, and thus a change in series electrical resistance occurs. In this case, the region where the phase change occurs is illustrated as phase change region 41 in FIG. 13.
Ground (GND) line 37 is connected via contact plug 36 to another diffusion layer 34 of the transistor.
A storage device is comprised of heater electrode 38, phase change material layer 39 and upper electrode 40, and the storage device is connected via the MOS transistor to the GND line, whereby one memory cell is constructed.
With GND line 37 connected to the ground and the transistor in an ON state, when a pulse voltage is applied to upper electrode 40, electric current flows in a current path including upper electrode 40, phase change material layer 39, heater electrode 38, diffusion layer 33, transistor channel, diffusion layer 34 and GND line 37. Such a passage of electric current causes generation of heat (Joule heat) in heater electrode 38 and thus phase change material layer 39 is partially heated, causing phase change. As a result, a change in electrical resistance value occurs. By controlling the heating proceeding, the phase change material can be set to a crystalline state (Set state) having a low resistance or a noncrystalline state (Reset state) having a high resistance. After the completion of heating, the state can be maintained. Consequently, data can be recorded (held) in a desired memory cell by using the change in electrical resistance.
In the related art of FIG. 13, heater electrode 38 is directly connected to diffusion layer 33. As a material for the heater electrode, tungsten (W) or the like can be used; but in order to implement ohmic contact with the diffusion layer, for example, titanium (Ti) is deposited on a lowermost layer part, and subsequently titanium nitride (TiN) acting as barrier metal is deposited thereon, and then tungsten for infilling is deposited thereon. When the area of contact between phase change material layer 39 and heater electrode 38 is reduced, the current density increases to improve the heating efficiency. In the structure of FIG. 13, however, since the depth of the heater electrode is increased, it is difficult to form a small heater electrode diameter under processing constraints. Accordingly, a large amount of current has to be provided for causing phase change. Consequently, the current ability of the transistor had to be raised. Thus, the size of the transistor increases, leading to an increase in cell size. Furthermore, consumption current also increases.
FIG. 14 illustrates a memory cell structure of another conventional PRAM in which improvements have been made for the above problems.
Referring to FIG. 14, heater electrode 38 of FIG. 13 is replaced with a stacked structure of contact plug 42 and heater electrode 46. Contact plug 42 is, similarly to heater electrode 38 of FIG. 13, formed of three layers of titanium, titanium nitride and tungsten. Heater electrode 46 is formed of tungsten or the like, and connected to an upper part of contact plug 42. With this structure, the height of heater electrode 46 can be set lower than the structure of FIG. 13 and thus the heater diameter can be set smaller. However, the heater diameter is limited by the resolution of photolithography in patterning. Thus, there is known an approach in which, in order to form a heater electrode of a smaller diameter, side wall 45 is formed in a side surface of opening 44 for heater electrode by use of insulating film made of, for example, silicon nitride and tungsten is filled inside the side wall.
Here, even when opening 44 is patterned by photolithography and thereafter side wall 45 is formed using an insulating film so that the heater diameter is reduced, the thickness of the side wall is limited by the bottom diameter of opening 44. This is originated in that, when opening 44 for heater electrode and side wall 45 are formed by anisotropic dry etching, in the case of microscopic contact hole, it is difficult to form a perfectly perpendicular side surface. More specifically, the side surface of opening 44 has a tapered shape, thereby becoming the bottom diameter smaller than the upper diameter. Consequently, the film thickness of side wall 45 should be reduced so that the bottom of opening 44 is not closed. Accordingly, it is difficult to reduce the upper part diameter of heater electrode 46 to a desired size.
In the related art of FIGS. 13 and 14, it is difficult to form the heater electrode so that the size thereof is smaller than a given size, and thus phase change region 41 is formed in contact with a planar part on the heater electrode. Accordingly, heat and current (electron) diffuses (the arrow indicated by “H”) toward the upper electrode and thus the current density does not increase. Consequently, the heating efficiency of the heater electrode is low; in order to reach a desired temperature, a large amount of current was needed. Further, since the planar upper surface of the heater electrode is in contact with the phase change material, phase change region 41 also extends widely. Accordingly, heat amount to be added till the completion of the phase change increases to cause the phase change in a large area. This is also a factor of increasing an amount of the applied current.
In contrast, Japanese Patent Laid-Open No. 2003-332529 describes a structure in which a combined electrode is formed by arranging a conductive material to cover dielectric mandrel being regular pyramid-shaped or cone-shaped insulator, and only the peak of the combined electrode is made to protrude from the dielectric layer covering the combined electrode, so that the area of contact between phase change material and heater electrode is reduced. However, this structure includes the dielectric mandrel, and thus phase change region cannot be formed directly on a contact from a transistor formed in the lower part. As a result, the degree of integration cannot be raised, so it is difficult to reduce the chip size of device.
Thus, there are demands for a phase change memory device in which the contact area between phase change material and heater electrode can be reduced to suppress current required for heating and also the phase change region can be formed directly on the contact to raise the degree of integration.